A Novel Vedic Multiplication for High Speed Systems using Quantum-dot Cellular Automata
DOI:
https://doi.org/10.15662/IJEETR.2026.0802085Keywords:
QCA, Vedic Multiplier, Urdhva Tiryagbhyam, Majority Gate, Low Power, Nano-scale ComputingAbstract
As the scaling limitations of conventional CMOS technology increasingly affect power efficiency and performance, alternative nano-scale computing paradigms have emerged as promising solutions. Quantum-dot Cellular Automata (QCA) is a post-CMOS technology that represents binary information through electron polarization rather than current flow, enabling ultra-low power dissipation and high-speed operation. In parallel, Vedic multiplication based on the Urdhva Tiryagbhyam sutra offers an efficient arithmetic technique by enabling parallel generation of partial products.
The Vedic multiplication algorithm is systematically translated into logical expressions and implemented using QCA majority gates and inverters with appropriate clocking schemes. The proposed architecture exploits the inherent parallelism of the Vedic sutra to reduce computational delay and circuit complexity. The design is modeled and simulated using QCA Designer to verify functional correctness.
Simulation results demonstrate that the proposed QCA-based Vedic multiplier achieves improved speed and reduced structural complexity compared to conventional CMOS-based multiplier architectures. Due to its low-power operation and parallel processing capability, the proposed design is well suited for high-speed arithmetic units in future nano-scale and energy-efficient computing systems.
References
1. S. Lent and G. L. Snider, “The development of quantum-dot cellular automata,” Springer, 2014.
2. N. Safoev and J. C. Jeon, “Design and evaluation of cell interaction based Vedic multiplier using QCA,” Electronics, vol. 9, no. 6, 2020.
3. A. Chudasama, T. N. Sasamal, and J. Yadav, “Efficient design of Vedic multiplier using ripple carry adder in QCA,” Computers & Electrical Engineering, 2018.
4. N. K. Reddy et al., “Efficient design of Vedic multiplier in QCA,” Telecommunication Systems, 2020.
5. J. Harirajkumar and T. Revathi, “Design of Vedic multiplier using QCA,” IJETCSE, 2016.
6. L. Wang and G. Xie, “A novel XOR/XNOR structure for modular design of QCA circuits,” IEEE Transactions on Circuits and Systems II, 2020.
7. V. Pudi and K. Sridharan, “Majority logic decomposition for QCA,” IEEE Transactions on Circuits and Systems II, 2012.
8. G. Cocorullo et al., “Design of efficient BCD adders in QCA,” IEEE Transactions, 2017.
9. A. N. Bahar and K. A. Wahid, “Design of QCA serial-parallel multiplier,” IEEE Transactions, 2015.
10. M. H. Moaiyeri et al., “Design of reversible full adder in QCA,” Microelectronics Journal, 2016.
11. E. Taherkhani et al., “Ultra-efficient reversible full adder-subtractor in QCA,” arXiv, 2016.
12. E. Alkaldy et al., “Optimum multiplexer design in QCA,” arXiv, 2020.
13. R. Chakrabarty and A. Khan, “Fault-free inverter design in QCA,” arXiv, 2023.
14. M. Repe and S. Koli, “Energy-efficient inverter in QCA,” Scientific Reports, 2024.
15. G. K. Veni et al., “Efficient design of Vedic cube calculator using QCA,” IJECET, 2024.
16. S. Angizi et al., “Novel QCA XOR gate design,” IEEE Transactions, 2017.
17. H. Cho and E. E. Swartzlander, “Adder designs in QCA,” IEEE Transactions, 2007.
18. K. Walus et al., “QCA Designer: A rapid design and simulation tool for QCA,” IEEE Transactions on Nanotechnology, 2004.
19. Amlani et al., “Digital logic gate using QCA,” Science, 1999.
20. Kim et al., “Clocking schemes in QCA,” IEEE Transactions, 2005.
21. S. Frost et al., “Wire crossing techniques in QCA,” IEEE Nanotechnology Conference, 2007.
22. M. Ottavi et al., “Defect tolerance in QCA circuits,” IEEE Transactions, 2006.
23. S. Sheikhfaal et al., “High-performance QCA multiplier design,” Microelectronics Journal, 2015.
24. Huang et al., “Low-power QCA arithmetic circuits,” IEEE Access, 2018.
25. Navi et al., “Two-layer QCA multiplier design,” Microelectronics Journal, 2014.
26. R. Zhang et al., “Energy dissipation analysis in QCA circuits,” IEEE Transactions, 2016.
27. P. T. Krein, Elements of Power Electronics. New York, USA: Oxford University Press, 1998.
28. S. Buso and P. Mattavelli, Digital Control in Power Electronics. San Rafael, CA, USA: Morgan & Claypool, 2006.
29. C.Nagarajan and M.Madheswaran - ‘Stability Analysis of Series Parallel Resonant Converter with Fuzzy Logic Controller Using State Space Techniques’- Taylor &Francis, Electric Power Components and Systems, Vol.39 (8), pp.780-793, May 2011. DOI: 10.1080/15325008.2010.541746
30. C.Nagarajan and M.Madheswaran - ‘Experimental verification and stability state space analysis of CLL-T Series Parallel Resonant Converter’ - Journal of Electrical Engineering, Vol.63 (6), pp.365-372, Dec.2012. DOI: 10.2478/v10187-012-0054-2
31. C.Nagarajan and M.Madheswaran - ‘Performance Analysis of LCL-T Resonant Converter with Fuzzy/PID Using State Space Analysis’- Springer, Electrical Engineering, Vol.93 (3), pp.167-178, September 2011. DOI 10.1007/s00202-011-0203-9
32. S.Tamilselvi, R.Prakash, C.Nagarajan,“Solar System Integrated Smart Grid Utilizing Hybrid Coot-Genetic Algorithm Optimized ANN Controller” Iranian Journal Of Science And Technology-Transactions Of Electrical Engineering, DOI10.1007/s40998-025-00917-z,2025
33. S.Tamilselvi, R.Prakash, C.Nagarajan,“ Adaptive sliding mode control of multilevel grid-connected inverters using reinforcement learning for enhanced LVRT performance” Electric Power Systems Research 253 (2026) 112428, doi.org/10.1016/j.epsr.2025.112428
34. S.Thirunavukkarasu, C. Nagarajan, 2024, “Performance Investigation on OCF and SCF study in BLDC machine using FTANN Controller," Journal of Electrical Engineering And Technology, Volume 20, pages 2675–2688, (2025), doi.org/10.1007/s42835-024-02126-w
35. C. Nagarajan, M.Madheswaran and D.Ramasubramanian- ‘Development of DSP based Robust Control Method for General Resonant Converter Topologies using Transfer Function Model’- Acta Electrotechnica et Informatica Journal , Vol.13 (2), pp.18-31,April-June.2013, DOI: 10.2478/aeei-2013-0025.
36. C.Nagarajan and M.Madheswaran - ‘DSP Based Fuzzy Controller for Series Parallel Resonant converter’- Springer, Frontiers of Electrical and Electronic Engineering, Vol. 7(4), pp. 438-446, Dec.12. DOI 10.1007/s11460-012-0212-0.
37. C.Nagarajan and M.Madheswaran - ‘Experimental Study and steady state stability analysis of CLL-T Series Parallel Resonant Converter with Fuzzy controller using State Space Analysis’- Iranian Journal of Electrical & Electronic Engineering, Vol.8 (3), pp.259-267, September 2012.
38. C.Nagarajan and M.Madheswaran, “Analysis and Simulation of LCL Series Resonant Full Bridge Converter Using PWM Technique with Load Independent Operation” has been presented in ICTES’08, a IEEE / IET International Conference organized by M.G.R.University, Chennai.Vol.no.1, pp.190-195, Dec.2007
39. Suganthi Mullainathan, Ramesh Natarajan, “An SPSS and CNN modelling based quality assessment using ceramic materials and membrane filtration techniques”, Revista Materia (Rio J.) Vol. 30, 2025, DOI: https://doi.org/10.1590/1517-7076-RMAT-2024-0721
40. M Suganthi, N Ramesh, “Treatment of water using natural zeolite as membrane filter”, Journal of Environmental Protection and Ecology, Volume 23, Issue 2, pp: 520-530,2022
41. A. Emadi, K. Rajashekara, S. S. Williamson, and S. M. Lukic, “Topological overview of hybrid electric and fuel cell vehicular power systems,” IEEE Transactions on Vehicular Technology, vol. 54, no. 3, pp. 763–770, May 2005.
42. Vimal, V. R., & Banerjee, J. S. (2025). Integrating PSO, GA, and ACO for Optimized ECG Feature Selection and Classification of Cardiac Disorders. SGS-Engineering & Sciences, 1(5).
43. Gopinathan, V. R. (2025). AI-Powered Kubernetes Orchestration for Complex Cloud-Native Workloads. International Journal of Research Publications in Engineering, Technology and Management (IJRPETM), 8(6), 13215-13225.
44. Mathew, A. From Conversation to Command Execution: A Comparative Threat Modeling and Risk Analysis of OpenClaw and ChatGPT. Risk, 100(1).
45. Inbavalli, M., & Arasu, T. (2015). Efficient Analysis of Frequent Item Set Association Rule Mining Methods. International Journal of Scientific & Engineering Research, 6(4).
46. Sugumar, R. (2025). Secure and Explainable AI Systems in Cloud-Based Applications: Bridging Trust and Performance. International Journal of Engineering & Extended Technologies Research (IJEETR), 7(4), 10328-10335.
47. Rajasekar, M. (2025). Risk-Aware Generative AI and Machine Learning Frameworks for Privacy-Preserving Banking and Trade Analytics over Cloud and 5G Networks. International Journal of Computer Technology and Electronics Communication, 8(4), 11078-11086.
48. Gopalakrishnan, S., Dhinakaran, D., Raja, S. E., Raghavan, P., & Girija, M. S. (2026). Fusion-Driven Medical Image Encryption Framework with Entropy-Calibrated Control and Integrity Assurance. KSII Transactions on Internet & Information Systems, 20(2).
49. G. Vimal Raja, K. K. Sharma (2014). Analysis and Processing of Climatic data using data mining techniques. Envirogeochimica Acta 1 (8):460-467.
50. Gopinathan, V. R. (2023). Cloud-First AI Security Architecture for Protecting Enterprise Digital Ecosystems and Financial Networks. International Journal of Research and Applied Innovations, 6(6), 10031-10039.
51. Mathew, A. A Secure, Trustworthy, and Regulated Framework for AI Agents in Distributed Networks.
52. Anbazhagan, K. (2025). Secure AI Enabled Enterprise Ecosystems for Fraud Prevention Compliance Automation and Real Time Analytics. International Journal of Multidisciplinary Research in Science, Engineering, Technology & Management, 1(4), 6-13.
53. Rajasekar, M. (2025). Risk-Aware Generative AI and Machine Learning Frameworks for Privacy-Preserving Banking and Trade Analytics over Cloud and 5G Networks. International Journal of Computer Technology and Electronics Communication, 8(4), 11078-11086.
