FPGA-Based Real-Time Image Edge Detection using Pipelined Sobel and Canny Operations
DOI:
https://doi.org/10.15662/IJEETR.2026.0802080Keywords:
Real-Time Image Processing, Edge Detection, Sobel Operato, Canny Edge Detection, FPGA ImplementationAbstract
Image edge detection is a fundamental requirement in applications like surveillance, robotics, medical imaging, and intelligent transportation. Sobel is fast, simple, hardware-friendly operator which has some smoothing effect due to small averaging window for more noise-resistant. Canny operator provides good accuracy for edge detection to produce sharper and cleaner edges by applying gaussian smoothing. An efficient FPGA- based architecture for real-time image edge detection using combined Sobel and Canny operators with improvement using adaptive thresholding and morphological clean-up with a fully pipelined, streaming hardware approach, enabling continuous pixel-level processing with minimal latency is proposed. The Sobel operator is used to extract gradient components (Gx, Gy) with optimized fixed-point arithmetic and Canny operator to improve accuracy and latency. The designs are modeled in Verilog HDL and Zynq 7000 Series FPGA is used for implementation. The simulation results confirm that the combination of Sobel’s low-cost gradient extraction with Canny’s superior edge refinement provides 5.7% to 62.5%.
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